Accompanying the reduction in the size and weight and the increase in the functions of electronic apparatuses, further reduction in the size of integrated circuits and increase in the degree of integration of circuit boards have been demanded. In view of this, there has been proposed a multilayer printed wiring board having a multilayer circuit board. As one example of a method for manufacturing a multilayer printed wiring board, a build-up system is exemplified (see PTL 1 to PTL 3).
In the build-up system, an adhesive film having an insulating property is laminated on a circuit board, followed by heating, thereby curing an insulating layer of the adhesive film, and thereafter, a via-hole is formed by a laser process or the like. Subsequently, by using an alkaline permanganate or the like, a surface roughening treatment and a treatment of removing a smear remaining in the via-hole (referred to as a desmear treatment) are performed. Subsequently, the surface of the multilayer printed wiring board and the inside of the via-hole are subjected to an electroless copper plating treatment to form a conductor layer, and further, a circuit pattern is formed on the insulating layer having the conductor layer formed thereon. Then, on the circuit board having the circuit pattern formed thereon, the adhesive film is laminated, and the formation of a via-hole and the formation of a conductor layer are repeated. By doing this, a multilayer printed wiring board can be manufactured.
In this method, the adhesion strength between the adhesive film laminated on the circuit board and the conductor layer is ensured by the surface roughness (irregular shape) obtained by roughening the surface of the insulating layer of the adhesive film and the anchor effect between the roughened surface of the insulating layer and the conductor layer flowing therein. Due to this, the surface roughness of the surface of the insulating layer of the adhesive film is 0.6 μm or more.
However, in a conventional multilayer printed wiring board in which the adhesion strength between the insulating layer of the adhesive film and the conductor layer is dependent on the anchor effect, if the wiring width in the printed wiring which is the conductor layer is less than 10 μm, short circuit (so-called short circuit failure) of the printed wiring, disconnection (so-called open circuit failure) of the printed wiring, or the like is likely to occur.
Therefore, in order to miniaturize a printed wiring formed on a circuit board, a method capable of ensuring the adhesion strength between the conductor layer and even an interlayer insulating layer having a smooth surface-roughened state by a method different from a conventional joining method dependent on the anchor effect has been demanded.
In connection with this, there has been proposed an adhesive film of a multilayer printed wiring board configured to have a “two-layer structure”. That is, a layer in charge of adhesion for ensuring adhesion between an insulating layer of an adhesive film and a conductor layer, and a layer in charge of embedment for ensuring an insulating property by embedding a wiring are provided (see PTL 4). In PTL 4, with the aim of ensuring stronger adhesiveness to an electroless copper plating than a conventional technique, an adhesive film having a two-layer structure including a layer in charge of adhesion containing an electroless copper plating and an insulating resin layer is also disclosed. However, this disclosure does not aim at smoothing the surface roughness, or meet the recent demand for miniaturization of a printed wiring.
Further, there has been proposed a resin composition capable of obtaining a roughened surface by roughening/desmear treatment so that an adhesion strength between an insulating layer of an adhesive film and a conductor layer can be ensured (see PTL 5). However, the roughening of the surface of the adhesive film proceeds as the desmear treatment proceeds by the conventional roughening/desmear treatment, and therefore, it is difficult to keep an interlayer insulating layer of the adhesive film smooth while sufficiently performing the desmear treatment. In addition, depending on the surface roughness of the interlayer insulating layer of the adhesive film or the adhesiveness between the insulating layer of the adhesive film and the conductor layer, swelling of the conductor layer (so-called blister defects) may sometimes be caused to increase the difficulty in production. In this manner, even the technique disclosed in PTL 5 does not sufficiently meet the recent demand for miniaturization of a printed wiring board.
Further, with respect to a build-up layer formed by a build-up process, in order to ensure the processing dimensional stability and also to reduce the amount of warpage after mounting a semiconductor, the reduction in thermal expansion coefficient has been demanded. As the most mainstream method therefor, a method in which a silica filler is highly filled is exemplified. For example, by incorporating a silica filler in an amount of 40% by mass or more in the build-up layer, the thermal expansion coefficient of the build-up layer is reduced (see, for example, PTL 6 to PTL 8).